#ifndef _SOC_CLOCK_H
#define _SOC_CLOCK_H

#ifdef __TOP_HALF__

enum clks {
	CLK_FCLK		= 1,
	CLK_HCLK		= 2,
	CLK_PCLK		= 3,
	CLK_NAND		= 4,
	CLK_UART0		= 5,
	CLK_UART1		= 6,
	CLK_UART2		= 7,
	CLK_PWMTIMER	= 8,
	CLK_GPIO		= 9
};

struct clk {
};

#else 

struct clk;

struct clk_ops {
	int (*enable)(struct clk *clk, int enable);
    int (*set_rate)(struct clk *c, unsigned int rate);
    unsigned int (*get_rate)(struct clk *clk);
    unsigned int (*round_rate)(struct clk *clk, unsigned int rate);
    int (*set_parent)(struct clk *clk, struct clk *parent);
};

struct clk {
	char *name;
	int usage;	
	unsigned int rate;
	struct clk *parent;
	struct clk_ops *ops;
	unsigned int ctrlbit;
	struct list_head n_clk_list;
};

extern struct clk clk_xtal;
extern struct clk clk_mpll;
extern struct clk clk_upll;
extern struct clk clk_f;
extern struct clk clk_h;
extern struct clk clk_p;

int s3c_register_clock(struct clk *clk);
void s3c_register_baseclocks(void);
void s3c2440_setup_clocks(unsigned int xtal);

#endif

#endif /* _SOC_CLOCK_H */

